Quantcast
Channel: Cadence Custom IC Skill Forum
Viewing all articles
Browse latest Browse all 5097

Layout cell boundary

$
0
0

Hi all,

I'm encountering a annoying issue.

First, I place a lot of layout cells/transistors into a layout cell.

Then, after packing the cells into a smaller area, when zooming to fit all, it zooms to a big area (the original placement .... zoom out a lot).

It seems the cell still remembers the original placement of cells/transistors.

Does anyone encounter the same issue?

Any comment is much appreciated.

Thank you

Will


Viewing all articles
Browse latest Browse all 5097


<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>